Uni-President China. has filed a patent for a capacitance measurement circuit. The circuit includes an analog front-end circuit, a parasitic capacitor, an analog to digital converter (ADC), an output shift register, and a controller. The controller controls the circuit to measure the capacitance of a capacitor by connecting and disconnecting various components and converting voltage differences into digital signals. The circuit can accurately measure capacitance values. GlobalData’s report on Uni-President China gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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According to GlobalData’s company profile on Uni-President China, was a key innovation area identified from patents. Uni-President China's grant share as of September 2023 was 53%. Grant share is based on the ratio of number of grants to total number of patents.
Capacitance measurement circuit with current mirror circuits and adc
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A recently filed patent (Publication Number: US20230314495A1) describes a capacitance measurement circuit that includes an analog front-end circuit, a parasitic capacitor, an analog to digital converter (ADC), an output shift register, and a controller. The circuit is designed to accurately measure the capacitance of a target capacitor.
The analog front-end circuit consists of multiple current mirror circuits connected in parallel, with the number of circuits determined by the value of N. The controller controls the various components of the circuit to perform the measurement process. This process involves turning on one of the current mirror circuits, disconnecting the target capacitor, and collecting analog front-end output voltages. The analog front-end circuit charges the parasitic capacitor to a reference voltage and records the corresponding output voltage. The target capacitor is then connected, and the ADC converts the difference between the output voltages into a digital signal.
Based on the value of the digital signal, the controller determines the number of current mirror circuits to be turned on. This value, denoted as m, is calculated based on a specific formula. The measurement process is repeated to obtain a second digital signal, and the output shift register is controlled to shift the second digital signal based on the value of m, resulting in the capacitance measurement value of the target capacitor.
The patent also describes additional details of the analog front-end circuit, including the use of an operational amplifier, capacitors, and current mirror sub-circuits. The circuit includes control switches and MOS transistors that are controlled by the controller to enable the connection and disconnection of the target capacitor and the ADC.
Overall, this patent presents a capacitance measurement circuit that utilizes a specific configuration of components and a controlled measurement process to accurately determine the capacitance of a target capacitor. The circuit's design and operation allow for precise measurements and can be applied in various applications where capacitance measurement is required.
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